Gecko [ 167.86.127.34 ]

Name	Size	Permission
asm_386.s	5.27 KB	-rw-r--r--
asm_amd64.s	3.89 KB	-rw-r--r--
asm_arm.s	5.22 KB	-rw-r--r--
asm_arm64.s	1.63 KB	-rw-r--r--
asm_mips64x.s	3.96 KB	-rw-r--r--
asm_mipsx.s	2.88 KB	-rw-r--r--
asm_ppc64x.s	4.48 KB	-rw-r--r--
asm_s390x.s	4.79 KB	-rw-r--r--
atomic_386.go	1.62 KB	-rw-r--r--
atomic_amd64.go	1.73 KB	-rw-r--r--
atomic_arm.go	4.31 KB	-rw-r--r--
atomic_arm64.go	1.38 KB	-rw-r--r--
atomic_arm64.s	3.21 KB	-rw-r--r--
atomic_mips64x.go	1.45 KB	-rw-r--r--
atomic_mips64x.s	1.06 KB	-rw-r--r--
atomic_mipsx.go	2.49 KB	-rw-r--r--
atomic_mipsx.s	482 B	-rw-r--r--
atomic_ppc64x.go	1.45 KB	-rw-r--r--
atomic_ppc64x.s	1.34 KB	-rw-r--r--
atomic_riscv64.go	1.37 KB	-rw-r--r--
atomic_riscv64.s	5.48 KB	-rw-r--r--
atomic_s390x.go	1.68 KB	-rw-r--r--
atomic_test.go	5.1 KB	-rw-r--r--
atomic_wasm.go	3.69 KB	-rw-r--r--
bench_test.go	1.78 KB	-rw-r--r--
stubs.go	795 B	-rw-r--r--
sys_linux_arm.s	3.14 KB	-rw-r--r--
sys_nonlinux_arm.s	1.34 KB	-rw-r--r--

Code Editor : atomic_arm64.s

// Copyright 2014 The Go Authors. All rights reserved.
// Use of this source code is governed by a BSD-style
// license that can be found in the LICENSE file.

#include "textflag.h"

// uint32 runtime∕internal∕atomic·Load(uint32 volatile* addr)
TEXT ·Load(SB),NOSPLIT,$0-12
	MOVD	ptr+0(FP), R0
	LDARW	(R0), R0
	MOVW	R0, ret+8(FP)
	RET

// uint8 runtime∕internal∕atomic·Load8(uint8 volatile* addr)
TEXT ·Load8(SB),NOSPLIT,$0-9
	MOVD	ptr+0(FP), R0
	LDARB	(R0), R0
	MOVB	R0, ret+8(FP)
	RET

// uint64 runtime∕internal∕atomic·Load64(uint64 volatile* addr)
TEXT ·Load64(SB),NOSPLIT,$0-16
	MOVD	ptr+0(FP), R0
	LDAR	(R0), R0
	MOVD	R0, ret+8(FP)
	RET

// void *runtime∕internal∕atomic·Loadp(void *volatile *addr)
TEXT ·Loadp(SB),NOSPLIT,$0-16
	MOVD	ptr+0(FP), R0
	LDAR	(R0), R0
	MOVD	R0, ret+8(FP)
	RET

// uint32 runtime∕internal∕atomic·LoadAcq(uint32 volatile* addr)
TEXT ·LoadAcq(SB),NOSPLIT,$0-12
	B	·Load(SB)

TEXT runtime∕internal∕atomic·StorepNoWB(SB), NOSPLIT, $0-16
	B	runtime∕internal∕atomic·Store64(SB)

TEXT runtime∕internal∕atomic·StoreRel(SB), NOSPLIT, $0-12
	B	runtime∕internal∕atomic·Store(SB)

TEXT runtime∕internal∕atomic·Store(SB), NOSPLIT, $0-12
	MOVD	ptr+0(FP), R0
	MOVW	val+8(FP), R1
	STLRW	R1, (R0)
	RET

TEXT runtime∕internal∕atomic·Store8(SB), NOSPLIT, $0-9
	MOVD	ptr+0(FP), R0
	MOVB	val+8(FP), R1
	STLRB	R1, (R0)
	RET

TEXT runtime∕internal∕atomic·Store64(SB), NOSPLIT, $0-16
	MOVD	ptr+0(FP), R0
	MOVD	val+8(FP), R1
	STLR	R1, (R0)
	RET

TEXT runtime∕internal∕atomic·Xchg(SB), NOSPLIT, $0-20
again:
	MOVD	ptr+0(FP), R0
	MOVW	new+8(FP), R1
	LDAXRW	(R0), R2
	STLXRW	R1, (R0), R3
	CBNZ	R3, again
	MOVW	R2, ret+16(FP)
	RET

TEXT runtime∕internal∕atomic·Xchg64(SB), NOSPLIT, $0-24
again:
	MOVD	ptr+0(FP), R0
	MOVD	new+8(FP), R1
	LDAXR	(R0), R2
	STLXR	R1, (R0), R3
	CBNZ	R3, again
	MOVD	R2, ret+16(FP)
	RET

// bool runtime∕internal∕atomic·Cas64(uint64 *ptr, uint64 old, uint64 new)
// Atomically:
//      if(*val == *old){
//              *val = new;
//              return 1;
//      } else {
//              return 0;
//      }
TEXT runtime∕internal∕atomic·Cas64(SB), NOSPLIT, $0-25
	MOVD	ptr+0(FP), R0
	MOVD	old+8(FP), R1
	MOVD	new+16(FP), R2
again:
	LDAXR	(R0), R3
	CMP	R1, R3
	BNE	ok
	STLXR	R2, (R0), R3
	CBNZ	R3, again
ok:
	CSET	EQ, R0
	MOVB	R0, ret+24(FP)
	RET

// uint32 xadd(uint32 volatile *ptr, int32 delta)
// Atomically:
//      *val += delta;
//      return *val;
TEXT runtime∕internal∕atomic·Xadd(SB), NOSPLIT, $0-20
again:
	MOVD	ptr+0(FP), R0
	MOVW	delta+8(FP), R1
	LDAXRW	(R0), R2
	ADDW	R2, R1, R2
	STLXRW	R2, (R0), R3
	CBNZ	R3, again
	MOVW	R2, ret+16(FP)
	RET

TEXT runtime∕internal∕atomic·Xadd64(SB), NOSPLIT, $0-24
again:
	MOVD	ptr+0(FP), R0
	MOVD	delta+8(FP), R1
	LDAXR	(R0), R2
	ADD	R2, R1, R2
	STLXR	R2, (R0), R3
	CBNZ	R3, again
	MOVD	R2, ret+16(FP)
	RET

TEXT runtime∕internal∕atomic·Xchguintptr(SB), NOSPLIT, $0-24
	B	runtime∕internal∕atomic·Xchg64(SB)

TEXT ·And8(SB), NOSPLIT, $0-9
	MOVD	ptr+0(FP), R0
	MOVB	val+8(FP), R1
	LDAXRB	(R0), R2
	AND	R1, R2
	STLXRB	R2, (R0), R3
	CBNZ	R3, -3(PC)
	RET

TEXT ·Or8(SB), NOSPLIT, $0-9
	MOVD	ptr+0(FP), R0
	MOVB	val+8(FP), R1
	LDAXRB	(R0), R2
	ORR	R1, R2
	STLXRB	R2, (R0), R3
	CBNZ	R3, -3(PC)
	RET

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Code Editor : atomic_arm64.s