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asm_386.s
5.27
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asm_amd64.s
3.89
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asm_arm.s
5.22
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asm_arm64.s
1.63
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asm_mips64x.s
3.96
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asm_mipsx.s
2.88
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asm_ppc64x.s
4.48
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asm_s390x.s
4.79
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atomic_386.go
1.62
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atomic_amd64.go
1.73
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atomic_arm.go
4.31
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atomic_arm64.go
1.38
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atomic_arm64.s
3.21
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atomic_mips64x.go
1.45
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atomic_mips64x.s
1.06
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atomic_mipsx.go
2.49
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atomic_mipsx.s
482
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atomic_ppc64x.go
1.45
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atomic_ppc64x.s
1.34
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atomic_riscv64.go
1.37
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atomic_riscv64.s
5.48
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atomic_s390x.go
1.68
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atomic_test.go
5.1
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atomic_wasm.go
3.69
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bench_test.go
1.78
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stubs.go
795
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sys_linux_arm.s
3.14
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sys_nonlinux_arm.s
1.34
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Code Editor : sys_nonlinux_arm.s
// Copyright 2015 The Go Authors. All rights reserved. // Use of this source code is governed by a BSD-style // license that can be found in the LICENSE file. // +build !linux,arm #include "textflag.h" // TODO(minux): this is only valid for ARMv6+ // bool armcas(int32 *val, int32 old, int32 new) // Atomically: // if(*val == old){ // *val = new; // return 1; // }else // return 0; TEXT ·Cas(SB),NOSPLIT,$0 JMP ·armcas(SB) // Non-linux OSes support only single processor machines before ARMv7. // So we don't need memory barriers if goarm < 7. And we fail loud at // startup (runtime.checkgoarm) if it is a multi-processor but goarm < 7. TEXT ·Load(SB),NOSPLIT|NOFRAME,$0-8 MOVW addr+0(FP), R0 MOVW (R0), R1 MOVB runtime·goarm(SB), R11 CMP $7, R11 BLT 2(PC) DMB MB_ISH MOVW R1, ret+4(FP) RET TEXT ·Store(SB),NOSPLIT,$0-8 MOVW addr+0(FP), R1 MOVW v+4(FP), R2 MOVB runtime·goarm(SB), R8 CMP $7, R8 BLT 2(PC) DMB MB_ISH MOVW R2, (R1) CMP $7, R8 BLT 2(PC) DMB MB_ISH RET TEXT ·Load8(SB),NOSPLIT|NOFRAME,$0-5 MOVW addr+0(FP), R0 MOVB (R0), R1 MOVB runtime·goarm(SB), R11 CMP $7, R11 BLT 2(PC) DMB MB_ISH MOVB R1, ret+4(FP) RET TEXT ·Store8(SB),NOSPLIT,$0-5 MOVW addr+0(FP), R1 MOVB v+4(FP), R2 MOVB runtime·goarm(SB), R8 CMP $7, R8 BLT 2(PC) DMB MB_ISH MOVB R2, (R1) CMP $7, R8 BLT 2(PC) DMB MB_ISH RET
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